HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor

Hardware/software co-design of computationally intensive cryptosystems is the preferred solution to achieve the required speed for resource-limited embedded applications. This paper presents a microcode instruction set coprocessor which is designed to work with 8bit microcontrollers to implement a hyperelliptic curve cryptosystem. The microcode coprocessor is capable of performing a range of Galois Field operations using a dual-multiplier/dual-adder datapath and storing the intermediate results in the external RAM unit of the coprocessor. This coprocessor is programmed using the software routines of the 8-bit microcontroller which implement the HECC divisor’s doubling and addition operations. The Jacobian scalar multiplication was computed in a 656ms (7:87M cycles) on 8051 microcontroller running at 12MHz clock frequency which is 228 times faster than the pure software implementation. This number is 78ms (1M cycles) on the Atmel AVR microcontoller runing at 12MHz clock which is 106 times faster than the pure software implementation. Both HW/SW co-design implementations are comparable to existing HECC implementations on the 32-bit ARM7 at 80MHz. r 2006 Published by Elsevier B.V.